Graphics Memory Diagnostics Engineer CAN in Markham at Volt

Date Posted: 5/1/2018

Job Snapshot

  • Employee Type:
    Contingent
  • Location:
    Markham
  • Duration:
    48 weeks
  • Date Posted:
    5/1/2018
  • Job ID:
    78575
  • Pay Rate
    $37.0 - $42.25/Hour
  • Contact Name
    Volt Branch

Job Description

Volt has been serving some of the nation's strongest companies for over 60 years. We have a talented and upbeat staffing team focused on the quality of your career. As a Volt employee, you can expect the highest level of on-site support. We have a long-standing tradition of developing lasting and mutually beneficial relationships with our employees. We are a Six Sigma company that also offers many direct hire, full-time positions.

Volt is an Equal Opportunity Employer. Volt Workforce Solutions welcomes and encourages applications from people with disabilities. Accommodations are available on request for candidates taking part in all aspects of the selection process.

We are currently looking to hire a Graphics Memory Diagnostics Engineer for our client located in Markham, ON.  This is an approx. 12 months' contract.   

Job Description

  • Job Title: Graphics Memory Diagnostics Engineer
  • Employer: Volt Workforce Solutions Inc Canada
  • Pay Rate: $37.00- $42.26/hr (depending on experience)+ benefits available
  • Hours per week: 37.5 (7.5 hrs per day)
  • Term: ASAP to 10/16/2018 (12 months from start date)
  • Location: Markham, ON, CAN L3T7X6

Job Description :

Be part of the world's most leading graphics accelerator team developing test diagnostics for the functional and behavior verification of state-of-the-art graphics accelerators. This role is responsible for implementing HW diagnostics, as well as analyzing and debugging the results.

Candidate should have a minimum of 3 years of related experience in the diagnostic or verification environments with emphasis on ASIC system-level testing. Please be sure your relevant experience is highlighted on your resume when you apply.

The candidate would be responsible for writing, debugging and optimizing functional and stress tests for DRAM, memory subsystem and high level system-on-chip hardware IP.

Must be able to work with hardware architects and logic designers to solve functional issues, and customer support engineers to help resolve testing deficiencies.

The candidate should be an enthusiastic self-starter, proactive, able to share ideas, and able to provide design verification leadership.

KEY RESPONSIBILITIES

  • Develop diagnostics software to bring-up and validate ASIC features
  • Participate in APU/GPU silicon bring up
  • Identify and help resolve ASIC, board and firmware issues, provide diagnostics support to external customers and internal engineering teams
  • Provide technical guidance to other IP teams
  • Responsible for execution of programs, multiple projects on the go
  • Forward thinker to improve development process and drive innovation


REQUIREMENTS

  • B.Sc. or M.Sc. In EE or CS or equivalent is required
  • Good English required – verbal and written


EXPERIENCE AND SKILLS

  • A minimum of 3 years of experience on diagnostic, driver or embedded SW development and closely interact with HW designers.
  • 3 years of related experience in the verification environments with emphasis on ASIC system-level testing.
  • Strong mix of large-scale software development ability and understanding of PC architecture
  • Proficient in C/C++ object oriented programming
  • Familiar with source controls systems like Perforce, SVN and Git
  • Development experience in Linux, knowledge and experience of device driver or firmware development
  • Familiar with memory subsystems and caches.
  • Good working knowledge of the PCI/PCIe Bus is preferred
  • Hands-on experience with board bring up, DRAM operation, virtual memory, virtualization, 3D graphics terminology is preferred.
  • Participate in system-level verification planning and debugging.
  • Strong debugging and testing skills
  • Strong communication skills
  • Must be able to work with hardware architects and logic designers to solve functional issues, and customer support engineers to help resolve testing deficiencies.
  • The candidate should be an enthusiastic self-starter, proactive, able to share ideas, and able to provide design verification leadership.